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Implementation of High-Order Convolution Algorithms with Low Latency on Silicon Chips

Authors: Anderegg, Rolf; Felber, Norbert; Fichtner, Wolfgang; Franke, Ulrich
Affiliation: Weiss Engineering LTD., Uster, Switzerland ; Integrated Systems Laboratory, Swiss Federal Institute of Technology Zurich (ETH), Switzerland
Publication Date: October 2004
Type: Convention Paper
Cost: Free to AES members & institutions and $33 to non-members