A Flexible Architecture for Real-Time Sound Synthesis and Digital Signal Processing

Raczinski JM, Marino G, Sladek S, Fontalirant V. A Flexible Architecture for Real-Time Sound Synthesis and Digital Signal Processing. In: AES Convention 108. Audio Engineering Society; 2000. Paper 5169. Available from: https://aes.org/publications/elibrary-page/?id=9169

@inproceedings{Raczinski2000_9169,
  author = {Raczinski, Jean-Michel and Marino, Gérard and Sladek, Stéphane and Fontalirant, Vincent},
  title = {{A Flexible Architecture for Real-Time Sound Synthesis and Digital Signal Processing}},
  booktitle = {AES Convention 108},
  note = {Paper 5169},
  year = {2000},
  month = feb,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=9169}
}

TY  - CPAPER
TI  - A Flexible Architecture for Real-Time Sound Synthesis and Digital Signal Processing
AU  - Raczinski, Jean-Michel
AU  - Marino, Gérard
AU  - Sladek, Stéphane
AU  - Fontalirant, Vincent
T2  - AES Convention 108
M1  - Paper 5169
PY  - 2000
DA  - 2000/02/06
UR  - https://aes.org/publications/elibrary-page/?id=9169
PB  - Audio Engineering Society
LA  - en
AB  - This paper presents the architecture of a standard PCI plug-in board, which has been designed for real-time sound synthesis and can be used for general-purpose digital signal processing. Since it is based on Field Programmable Gate Arrays (FPGA), it combines the speed of hardware with the flexibility of software.
ER  -