Theory and VLSI Implementation of Asynchronous Sample-Rate Converters

Adams RW, Kwan T. Theory and VLSI Implementation of Asynchronous Sample-Rate Converters. In: AES Convention 94. Audio Engineering Society; 1993. Paper 3570. Available from: https://aes.org/publications/elibrary-page/?id=6593

@inproceedings{Adams1993_6593,
  author = {Adams, Robert W. and Kwan, Tom},
  title = {{Theory and VLSI Implementation of Asynchronous Sample-Rate Converters}},
  booktitle = {AES Convention 94},
  note = {Paper 3570},
  year = {1993},
  month = mar,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=6593}
}

TY  - CPAPER
TI  - Theory and VLSI Implementation of Asynchronous Sample-Rate Converters
AU  - Adams, Robert W.
AU  - Kwan, Tom
T2  - AES Convention 94
M1  - Paper 3570
PY  - 1993
DA  - 1993/03/06
UR  - https://aes.org/publications/elibrary-page/?id=6593
PB  - Audio Engineering Society
LA  - en
AB  - Asynchronous sample-rate conversion requires the solution to four major problems: clock time-of-arrival estimation, reduction of filter coefficients, RAM read/write pointer control, and dynamic filter adaptation for the undersampled case (FSout < FSin). Existing solutions to these problems involve multiple DSP chips with complicated external hardware. Design details of a new one-chip dedicated asynchronous sample-rate converter IC will be presented.
ER  -