S. Harris, J. Scott, A. Krone, and S.-C. Lin, “A Single-Chip Stereo 16-Bit A/D Converter and Quad 16-Bit D/A Converter for Automotive and Consumer Applications,” in Proc. AES Convention 94, Mar. 1993, Paper 3588. [Online]. Available: https://aes.org/publications/elibrary-page/?id=6576
Harris S, Scott J, Krone A, Lin SC. A Single-Chip Stereo 16-Bit A/D Converter and Quad 16-Bit D/A Converter for Automotive and Consumer Applications. In: AES Convention 94. Audio Engineering Society; 1993. Paper 3588. Available from: https://aes.org/publications/elibrary-page/?id=6576
@inproceedings{Harris1993_6576,
author = {Harris, Steven and Scott, Jeff and Krone, Andy and Lin, Shao-Chyi},
title = {{A Single-Chip Stereo 16-Bit A/D Converter and Quad 16-Bit D/A Converter for Automotive and Consumer Applications}},
booktitle = {AES Convention 94},
note = {Paper 3588},
year = {1993},
month = mar,
publisher = {Audio Engineering Society},
url = {https://aes.org/publications/elibrary-page/?id=6576}
}
TY - CPAPER
TI - A Single-Chip Stereo 16-Bit A/D Converter and Quad 16-Bit D/A Converter for Automotive and Consumer Applications
AU - Harris, Steven
AU - Scott, Jeff
AU - Krone, Andy
AU - Lin, Shao-Chyi
T2 - AES Convention 94
M1 - Paper 3588
PY - 1993
DA - 1993/03/06
UR - https://aes.org/publications/elibrary-page/?id=6576
PB - Audio Engineering Society
LA - en
AB - A single CMOS chip has been realized which includes two 16-bit A/D converters and four 16-bit D/A converters. Also included is an adjustable input gain section, as well as an adjustable output level section. An on-chip PLL allows the device to be clocked by an audio sample rate clock (for example 44.1 kHz). Topics discussed include design trade-offs in filter performance to achieve low cost, and novel techniques used to achieve a low-jitter integrated PLL.
ER -