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Convention Paper

An IC Chip Set for 20 Bit A/D Conversion

Authors: Adams, Robert W.

AES Convention 86 · Paper 2762 · March 1989

Abstract

A chip set has been developed which implements a high-resolution A/D converter using the noise-shaping/digital decimation technique presented in an earlier paper. The chip set consists of a front-end IC to implement the noise-shaping algorithm and a digital decimator IC to reduce the sampling rate. A new method of canceling the effects of digital waveform asymmetry has been developed, resulting in increased resolution. The application circuit in its minimum configuration gives a dynamic range of 108 dB. More complex configurations yield a dynamic range of 114 dB.

Details

Published in
AES Convention 86
AES Convention
86
Paper number
2762
Publication date
March 6, 1989
Session subject
Digital Signal Recording and Processing
Affiliation
CTI / dbx, Newton, MA (See document for exact affiliation information.)
Type
Convention Paper