The Design of a Digital Signal Peak Limiter for Audio Signal Processing

Mapes-Riordan D, Leach J,WM. The Design of a Digital Signal Peak Limiter for Audio Signal Processing. In: AES Convention 83. Audio Engineering Society; 1987. Paper 2494. Available from: https://aes.org/publications/elibrary-page/?id=4908

@inproceedings{MapesRiordan1987_4908,
  author = {Mapes-Riordan, Dan and Leach, Jr., W. Marshall},
  title = {{The Design of a Digital Signal Peak Limiter for Audio Signal Processing}},
  booktitle = {AES Convention 83},
  note = {Paper 2494},
  year = {1987},
  month = oct,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=4908}
}

TY  - CPAPER
TI  - The Design of a Digital Signal Peak Limiter for Audio Signal Processing
AU  - Mapes-Riordan, Dan
AU  - Leach, Jr., W. Marshall
T2  - AES Convention 83
M1  - Paper 2494
PY  - 1987
DA  - 1987/10/06
UR  - https://aes.org/publications/elibrary-page/?id=4908
PB  - Audio Engineering Society
LA  - en
AB  - The design of an audio signal limiter is presented which performs its function in the digital signal domain. To minimize distortion in the limiter attack, the gain reduction algorithm causes the gain to be reduced at the signal zero crossing level immediately preceding the peak which causes pain reduction. To minimize distortion in the limiter recovery, a unique algorithm is used which causes the release time to be inversely proportional to frequency. A prototype limiter has been tested on the air over Georgia Tech FM studio radio station WREK. A dedicated hardware version of the limiter is presently being developed.
ER  -