High Fidelity Digital Audio Conversion Using Low Cost Components

Wood KJ, Hawksford MOJ. High Fidelity Digital Audio Conversion Using Low Cost Components. In: AES Convention 65. Audio Engineering Society; 1980. Paper 1585. Available from: https://aes.org/publications/elibrary-page/?id=3783

@inproceedings{Wood1980_3783,
  author = {Wood, K. J. and Hawksford, M. O. J.},
  title = {{High Fidelity Digital Audio Conversion Using Low Cost Components}},
  booktitle = {AES Convention 65},
  note = {Paper 1585},
  year = {1980},
  month = feb,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=3783}
}

TY  - CPAPER
TI  - High Fidelity Digital Audio Conversion Using Low Cost Components
AU  - Wood, K. J.
AU  - Hawksford, M. O. J.
T2  - AES Convention 65
M1  - Paper 1585
PY  - 1980
DA  - 1980/02/06
UR  - https://aes.org/publications/elibrary-page/?id=3783
PB  - Audio Engineering Society
LA  - en
AB  - The development of digital audio has prompted research into data reduction schemes. To some extent this work has been superceded by falling storage costs as far as high fidelity is concerned. 12 or 13 bit coding is a minimum requirement with professionals opting for 16 bit word lengths. A 16 bit ADC module costs about 1000pounds, with DAC modules at around 300pounds. Add to this the extra hardware (filters, sample-hold, deglitcher) for a single channel system to get a figure around 2000pounds, double this to 4000 pounds as 16 bit converters are barely fast enough for mono use. Examination of the quality requirements implies that it is possible to mimic a 14 to 15 bit system for about 350pounds per channel using a 12 bit ADC (155pounds) two DAC's (60pounds) and a little op-amp based circuitry. A method of cancelling the offset errors associated with commercial JFET op-amps is described. The system can handle six variable offsets associated with gain scaling or polarity change once aligned within a wide tolerance zone necessary for unambiguous operation. A method for inaudibly recalibrating the whole system is incorporated in the logic, based upon techniques used in record scratch eliminators. A 15 bit linear DAC and deglitcher is described, which uses two relatively inexpensive DAC's in a novel manner. One extra adjustment reduces distortion introduced by the technique, the other being the output amplifier offset balance, which is no more critical than with one DAC. Finally a sample-hold circuit is described. It is designed specifically for audio use, and employs a new technique for reducing charge dump non-linearly to a steady d.c. level, which can be nulled to zero, and simultaneouly reduces the aperture jitter to below an estimated 10ns, which greatly reduces modulation noise. Circuit cost is below 10pounds.
ER  -