A Digital Class-D Amplifier with Power Supply Correction

Biallais A, de Buys F, de Saint-Moulin R, Dooper L, Putzeys B, Reefman D, Rutten R, Tol J, van den Boom J. A Digital Class-D Amplifier with Power Supply Correction. In: AES Convention 121. Audio Engineering Society; 2006. Paper 6860. Available from: https://aes.org/publications/elibrary-page/?id=13694

@inproceedings{Biallais2006_13694,
  author = {Biallais, Arnaud and de Buys, Frans and de Saint-Moulin, Renaud and Dooper, Lûtsen and Putzeys, Bruno and Reefman, Derk and Rutten, Robert and Tol, Jeroen and van den Boom, Jeroen},
  title = {{A Digital Class-D Amplifier with Power Supply Correction}},
  booktitle = {AES Convention 121},
  note = {Paper 6860},
  year = {2006},
  month = oct,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=13694}
}

TY  - CPAPER
TI  - A Digital Class-D Amplifier with Power Supply Correction
AU  - Biallais, Arnaud
AU  - de Buys, Frans
AU  - de Saint-Moulin, Renaud
AU  - Dooper, Lûtsen
AU  - Putzeys, Bruno
AU  - Reefman, Derk
AU  - Rutten, Robert
AU  - Tol, Jeroen
AU  - van den Boom, Jeroen
T2  - AES Convention 121
M1  - Paper 6860
PY  - 2006
DA  - 2006/10/06
UR  - https://aes.org/publications/elibrary-page/?id=13694
PB  - Audio Engineering Society
LA  - en
AB  - Digital class-D amplifiers are cost-effective solutions for a wide range of digital audio applications, because of their high power efficiency and ease of integration. This paper presents a real-time cost-effective power supply correction algorithm, which increases the power supply rejection of an open-loop digital class-D amplifier substantially. It enables open-loop digital class-D amplifiers with inexpensive power supplies with less decoupling. Measurements on a prototype amplifier with single-ended speaker loads show 57dB suppression for 100Hz supply ripple, while intermodulation products between a 100Hz ripple and a 1kHz tone are attenuated with 40dB. The dynamic range of the amplifier is 94dB, which is in agreement with phase noise measurements on the on-chip clock generator.
ER  -