Development of a Single Chip IC for Dolby B-C-Type Noise Reduction Systems

Aizawa K, Haeno A, Takizawa Y, Nagashima N, Suzuki N, Yokogawa F. Development of a Single Chip IC for Dolby B-C-Type Noise Reduction Systems. In: AES Convention 70. Audio Engineering Society; 1981. Paper 1814. Available from: https://aes.org/publications/elibrary-page/?id=11940

@inproceedings{Aizawa1981_11940,
  author = {Aizawa, Kohki and Haeno, Akira and Takizawa, Yoshiyuki and Nagashima, Nozomu and Suzuki, Nobuhiro and Yokogawa, Fumihiko},
  title = {{Development of a Single Chip IC for Dolby B-C-Type Noise Reduction Systems}},
  booktitle = {AES Convention 70},
  note = {Paper 1814},
  year = {1981},
  month = oct,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=11940}
}

TY  - CPAPER
TI  - Development of a Single Chip IC for Dolby B-C-Type Noise Reduction Systems
AU  - Aizawa, Kohki
AU  - Haeno, Akira
AU  - Takizawa, Yoshiyuki
AU  - Nagashima, Nozomu
AU  - Suzuki, Nobuhiro
AU  - Yokogawa, Fumihiko
T2  - AES Convention 70
M1  - Paper 1814
PY  - 1981
DA  - 1981/10/06
UR  - https://aes.org/publications/elibrary-page/?id=11940
PB  - Audio Engineering Society
LA  - en
AB  - The Dolby C-type noise reduction (NR) system was designed to provide 20 dB of noise reduction compared to the 10dB obtained from the present Dolby B-type system. Although the Dolby C-type noise reduction system is much more complex, it was possible to design a single integrated circuit chip to operate in any of 3 modes (NR OFF/B/C) for either encoding (RECORD) or decoding (PLAYBACK) functions. Mode and function selection are accomplished by applying control volumes to only two pins of the standard 28 pin package.
ER  -