Convention Paper
Towards a Better Understanding of 1-Bit Sigma-Delta Modulators - Part 2
AES Convention 111 · Paper 5477 · November 2001
Abstract
This paper extends our previous studies of 1-bit sigma-delta modulators. We now investigate 11/2-bit (i.e., 3 level) systems, and again find that we can predict their idle-tone behavior and the spectral structure of their output. We address the question of whether sigma-delta modulators are adequately dithered by their internal noise, and compare the behavior of minimum-phase and non-minimum-phase (i.e., chaotic) modulator designs. Numerous computer simulations, greatly aided by coherent averaging, have guided us to two basic mechanisms that explain the distortion: the sweeping of the idle tone, and the saturating quantizer characteristic. A model of the nonlinearity of a dithered quantizer explains the general nature of the harmonic distortion components and their phases. The data also show unambiguously that the maximum possible dither should always be used.
