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The asynchronous clocks within IEEE1394 high performance serial bus present challenges for sample timing recovery in conjunction with the transmission of digital audio. Moreover the systematic nature of the jitter produced means that prototype systems are unlikely to produce worst-case performance. This is analysed and, with jitter audibility models developed elsewhere, a sampling jitter attenuation requirement is estimated.
Author (s): Dunn, Julian;
Affiliation:
Nanophon Limited, Cambridge, England
(See document for exact affiliation information.)
AES Convention: 106
Paper Number:4920
Publication Date:
1999-05-06
Session subject:
Signal Processing
DOI:
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Dunn, Julian; 1999; Sample Clock Jitter and Real-time Audio Over the IEEE1394 High Performance Serial Bus [PDF]; Nanophon Limited, Cambridge, England; Paper 4920; Available from: https://aes.org/publications/elibrary-page/?id=8260
Dunn, Julian; Sample Clock Jitter and Real-time Audio Over the IEEE1394 High Performance Serial Bus [PDF]; Nanophon Limited, Cambridge, England; Paper 4920; 1999 Available: https://aes.org/publications/elibrary-page/?id=8260
@inproceedings{Dunn1999sample,
title={{Sample Clock Jitter and Real-time Audio Over the IEEE1394 High Performance Serial Bus}},
author={Dunn, Julian},
year={1999},
month={may},
booktitle={Journal of the Audio Engineering Society},
publisher={Paper 4920; AES Convention 106; May 1999},
number={4920},
organization={AES},
}
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