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This paper examines the performance and implementation costs of various filter topologies using fixed and floating-point arithmetic, and paying attention to scaling, quantization noise, coefficient sensitivity, limit cycles, and overflow oscillations. The fractional and integer word-length requirements for various topologies are mathematically simulated. Optimal MAC units for specific topologies in terms of performance and cost are suggested.
Author (s): Clark, Rob J.;
Ifeachor, Emmanuel C.;
Rogers, Glenn M.;
Affiliation:
University of Plymouth, Devon, UK ; Allen & Heath Limited, Penryn, Cornwall, UK ; University of Plymouth, Devon, UK
(See document for exact affiliation information.)
AES Convention: 99
Paper Number:4100
Publication Date:
1995-10-06
Session subject:
Digital Signal Processing
DOI:
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Clark, Rob J.; Ifeachor, Emmanuel C.; Rogers, Glenn M.; 1995; The Study of Arithmetic and Wordlength Requirements for Digital Audio Filtering Hardware [PDF]; University of Plymouth, Devon, UK ; Allen & Heath Limited, Penryn, Cornwall, UK ; University of Plymouth, Devon, UK ; Paper 4100; Available from: https://aes.org/publications/elibrary-page/?id=7666
Clark, Rob J.; Ifeachor, Emmanuel C.; Rogers, Glenn M.; The Study of Arithmetic and Wordlength Requirements for Digital Audio Filtering Hardware [PDF]; University of Plymouth, Devon, UK ; Allen & Heath Limited, Penryn, Cornwall, UK ; University of Plymouth, Devon, UK ; Paper 4100; 1995 Available: https://aes.org/publications/elibrary-page/?id=7666
@inproceedings{Clark1995the,
title={{The Study of Arithmetic and Wordlength Requirements for Digital Audio Filtering Hardware}},
author={Clark, Rob J. and Ifeachor, Emmanuel C. and Rogers, Glenn M.},
year={1995},
month={oct},
booktitle={Journal of the Audio Engineering Society},
publisher={Paper 4100; AES Convention 99; October 1995},
number={4100},
organization={AES},
}
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