Reconfigurable Computing Systems for Audio DSP Applications

Tanner J,TC. Reconfigurable Computing Systems for Audio DSP Applications. In: AES Convention 103. Audio Engineering Society; 1997. Paper 4537. Available from: https://aes.org/publications/elibrary-page/?id=7242

@inproceedings{Tanner1997_7242,
  author = {Tanner, Jr., Theodore C.},
  title = {{Reconfigurable Computing Systems for Audio DSP Applications}},
  booktitle = {AES Convention 103},
  note = {Paper 4537},
  year = {1997},
  month = sep,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=7242}
}

TY  - CPAPER
TI  - Reconfigurable Computing Systems for Audio DSP Applications
AU  - Tanner, Jr., Theodore C.
T2  - AES Convention 103
M1  - Paper 4537
PY  - 1997
DA  - 1997/09/06
UR  - https://aes.org/publications/elibrary-page/?id=7242
PB  - Audio Engineering Society
LA  - en
AB  - Audio digital signal processing (DSP) systems comprise mainly of application specific integrated circuits (ASIC) or general purpose integrated circuits for DSP algorithm implementations. Audio DSP developers have to partition their designs into software or hardware functionality. The design decision is based on the flexibility and performance requirements of the system. Static Random Access Memory (SRAM) based Field Programmable Gate Arrays (FPGA) have the potential to offer audio DSP designers a third paradigm of design solutions. This paper will furnish an overview and introduction of a system that will meet the needs of both hardware and software based audio DSP solutions. Examples and benchmarks will be given for the system.
ER  -