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Convention Paper

Approximation of Decimation Filters Using the SMAC Architecture

Authors: Wise, Duane K.

AES Convention 103 · Paper 4592 · September 1997

Abstract

In a previous paper, the SMAC architecture has been demonstrated to perform third-order Lagrange polynomial interpolation with fewer DSP execution cycles. The features and constraints of the SMAC architecture are applied to an oversampled sine function to approximate a third-order decimation filter.

Details

Published in
AES Convention 103
AES Convention
103
Paper number
4592
Publication date
September 6, 1997
Session subject
Electronic Music Synthesis and Control
Type
Convention Paper