Pulse Edge Delay Error Correction (PEDEC)-A Novel Power Stage Error Correction Principle for Power Digital-Analog Conversion

Nielsen K. Pulse Edge Delay Error Correction (PEDEC)-A Novel Power Stage Error Correction Principle for Power Digital-Analog Conversion. In: AES Convention 103. Audio Engineering Society; 1997. Paper 4602. Available from: https://aes.org/publications/elibrary-page/?id=7177

@inproceedings{Nielsen1997_7177,
  author = {Nielsen, Karsten},
  title = {{Pulse Edge Delay Error Correction (PEDEC)-A Novel Power Stage Error Correction Principle for Power Digital-Analog Conversion}},
  booktitle = {AES Convention 103},
  note = {Paper 4602},
  year = {1997},
  month = sep,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=7177}
}

TY  - CPAPER
TI  - Pulse Edge Delay Error Correction (PEDEC)-A Novel Power Stage Error Correction Principle for Power Digital-Analog Conversion
AU  - Nielsen, Karsten
T2  - AES Convention 103
M1  - Paper 4602
PY  - 1997
DA  - 1997/09/06
UR  - https://aes.org/publications/elibrary-page/?id=7177
PB  - Audio Engineering Society
LA  - en
AB  - A novel pulse referenced error correction principle for digital to power conversion systems (Power DAC) is proposed-Pulse Edge Delay Error Correction (PEDEC). The method uses a digital pulse modulated signal as reference for error correction. The advantage of PEDEC is a combination of efficient correction of all power stage generated errors, and simple implementation. The paper presents the basic theory of PEDEC, modeling of the principle, and systematic approaches to PEDEC based amplifier design. The theoretical treatment is supplemented with a comprehensive, low level system simulation, that verify the system model and furthermore illustrate correction capability towards every error source in a switching power stage. PEDEC is concluded to be a very interesting new approach that could dramatically ease the design of high quality Power DAC's.
ER  -