A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder

Vernon S, Fruchter V, Kusevitzky S. A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder. In: AES Convention 95. Audio Engineering Society; 1993. Paper 3775. Available from: https://aes.org/publications/elibrary-page/?id=6458

@inproceedings{Vernon1993_6458,
  author = {Vernon, Steve and Fruchter, Vlad and Kusevitzky, Sergio},
  title = {{A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder}},
  booktitle = {AES Convention 95},
  note = {Paper 3775},
  year = {1993},
  month = oct,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=6458}
}

TY  - CPAPER
TI  - A Single-Chip DSP Implementation of a High-Quality Low Bit-Rate Multichannel Audio Coder
AU  - Vernon, Steve
AU  - Fruchter, Vlad
AU  - Kusevitzky, Sergio
T2  - AES Convention 95
M1  - Paper 3775
PY  - 1993
DA  - 1993/10/06
UR  - https://aes.org/publications/elibrary-page/?id=6458
PB  - Audio Engineering Society
LA  - en
AB  - A single-chip implementation of the Dolby AC-3 multichannel audio coding algorithm is presented. AC-3 is a high-quality, low bit-rate coding technique for 5.1-channel audio. This paper describes an efficient implementation of the algorithm on a powerful new DSP chip, the Zoran ZR38000. Specific areas in which the chip architecture has been exploited to optimize the algorithm are discussed, and contrasted with an equivalent implementation on a multichip platform using standard DSP technology.
ER  -