C. Erskine, “Architectural Cleanliness in a Digital Signal Processor,” in Proc. AES Convention 83, Oct. 1987, Paper 2561. [Online]. Available: https://aes.org/publications/elibrary-page/?id=4841
Erskine C. Architectural Cleanliness in a Digital Signal Processor. In: AES Convention 83. Audio Engineering Society; 1987. Paper 2561. Available from: https://aes.org/publications/elibrary-page/?id=4841
@inproceedings{Erskine1987_4841,
author = {Erskine, Cole},
title = {{Architectural Cleanliness in a Digital Signal Processor}},
booktitle = {AES Convention 83},
note = {Paper 2561},
year = {1987},
month = oct,
publisher = {Audio Engineering Society},
url = {https://aes.org/publications/elibrary-page/?id=4841}
}
TY - CPAPER
TI - Architectural Cleanliness in a Digital Signal Processor
AU - Erskine, Cole
T2 - AES Convention 83
M1 - Paper 2561
PY - 1987
DA - 1987/10/06
UR - https://aes.org/publications/elibrary-page/?id=4841
PB - Audio Engineering Society
LA - en
AB - The Analog Devices' ADSP-2100 Digital Signal Processor is a high-performance microprocessor optimized for the implementation of digital signal processing (DSP) and other computation-intensive algorithms. The departure of the architecture from the typical approach taken in DSP microcomputers allows much greater bus utilization and computational efficiency. This paper will describe some of the features that enable the ADSP-2100 to attain such a high degree of parallelism and computational ability, while at the same time remaining easy to program and integrate into a DSP system.
ER -