Amplitude and Group Delay Control Using a Digital Equalizing Processor

Matsumoto M, Ishikawa S, Sato K. Amplitude and Group Delay Control Using a Digital Equalizing Processor. In: AES Convention 85. Audio Engineering Society; 1988. Paper 2692. Available from: https://aes.org/publications/elibrary-page/?id=4752

@inproceedings{Matsumoto1988_4752,
  author = {Matsumoto, Masaharu and Ishikawa, Seiichi and Sato, Katsuaki},
  title = {{Amplitude and Group Delay Control Using a Digital Equalizing Processor}},
  booktitle = {AES Convention 85},
  note = {Paper 2692},
  year = {1988},
  month = nov,
  publisher = {Audio Engineering Society},
  url = {https://aes.org/publications/elibrary-page/?id=4752}
}

TY  - CPAPER
TI  - Amplitude and Group Delay Control Using a Digital Equalizing Processor
AU  - Matsumoto, Masaharu
AU  - Ishikawa, Seiichi
AU  - Sato, Katsuaki
T2  - AES Convention 85
M1  - Paper 2692
PY  - 1988
DA  - 1988/11/06
UR  - https://aes.org/publications/elibrary-page/?id=4752
PB  - Audio Engineering Society
LA  - en
AB  - Having obtained a new algorithm for amplitude and phase control, we have developed a FIR digital equalizer-we call it the digital equalizing processor-for audio systems. This digital equalizing processor can accurately calculate amplitude characteristics defined arbitrarily with linear phase. Furthermore, it can compensate for the group delay distortion of speaker systems. In this paper we describe its capabilities and processing algorithm.
ER  -