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Conference Paper

Implementation and Evaluation of the Usage of Low-Complexity Early Reflection Patterns for Realtime 6DOF Auditory Virtual Environments

Authors: Silzle, Andreas; Dick, Sascha; Disch, Sascha; Adami, Alexander

AES 2024 International Conference on Audio for Virtual and Augmented Reality · Paper 19 · August 2024

Abstract

Virtual and augmented reality (VR/AR) applications with 6-Degrees-of-Freedom (6DOF) require low latency processing where the binaural room impulse response (RIR) of the virtual space is synthesized at a high update rate for the dynamically changing listener position. Using a geometrical room acoustics model for generating early reflections (ER) usually requires high computational complexity. The here presented low complexity approach uses a simplified fixed ER pattern instead, producing a perceptually plausible and convincing experience for the listener at low computational load. The number and positions of the ERs are derived from simple room acoustical parameters as input, using two different patterns for in- and outdoor. Only one common ER pattern is needed to process any number of sound sources in a scene. In an objective evaluation, complexity is measured based on pre-recorded source-listener trajectories showing substantial reduction of run-time complexity in a 6DOF audio rendering compared to a dynamically updated image source model. In a subjective evaluation, the perceptual quality of the proposed method is assessed in an interactive 6DOF AB-test based on the MPEG-I immersive audio renderer implementation of the algorithm. Results show that the proposed method is equally plausible as the reference approach using a dynamically updated image source model.

Details

Published in
AES 2024 International Conference on Audio for Virtual and Augmented Reality
Paper number
19
Publication date
August 5, 2024
Session subject
Audio for Virtual and Augmented Reality
Affiliation
Fraunhofer Institute for Integrated Circuits, Erlangen, Germany; Fraunhofer Institute for Integrated Circuits, Erlangen, Germany; Fraunhofer Institute for Integrated Circuits, Erlangen, Germany; Fraunhofer Institute for Integrated Circuits, Erlangen, Germany (See document for exact affiliation information.)
Type
Conference Paper