I. Bacivarov et al., “SHAPES - A Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis,” in Proc. AES Conference: 32nd International Conference, Sep. 2007, Paper 20. [Online]. Available: https://aes.org/publications/elibrary-page/?id=14216
Bacivarov I, Bazzana P, Beckinger M, Ceng J, Franck A, Haid W, Huang K, Kraemer S, Leupers R, Paolucci PS, et al. SHAPES - A Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis. In: AES Conference: 32nd International Conference. Audio Engineering Society; 2007. Paper 20. Available from: https://aes.org/publications/elibrary-page/?id=14216
@inproceedings{Bacivarov2007_14216,
author = {Bacivarov, Iuliana and Bazzana, Piergiovanni and Beckinger, Michael and Ceng, Jianjiang and Franck, Andreas and Haid, Wolfgang and Huang, Kai and Kraemer, Stefan and Leupers, Rainer and Paolucci, Pier S. and Sporer, Thomas and Thiele, Lothar and Vicini, Piero},
title = {{SHAPES - A Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis}},
booktitle = {AES Conference: 32nd International Conference},
note = {Paper 20},
year = {2007},
month = sep,
publisher = {Audio Engineering Society},
url = {https://aes.org/publications/elibrary-page/?id=14216}
}
TY - CPAPER
TI - SHAPES - A Scalable Parallel HW/SW Architecture Applied to Wave Field Synthesis
AU - Bacivarov, Iuliana
AU - Bazzana, Piergiovanni
AU - Beckinger, Michael
AU - Ceng, Jianjiang
AU - Franck, Andreas
AU - Haid, Wolfgang
AU - Huang, Kai
AU - Kraemer, Stefan
AU - Leupers, Rainer
AU - Paolucci, Pier S.
AU - Sporer, Thomas
AU - Thiele, Lothar
AU - Vicini, Piero
T2 - AES Conference: 32nd International Conference
M1 - Paper 20
PY - 2007
DA - 2007/09/06
UR - https://aes.org/publications/elibrary-page/?id=14216
PB - Audio Engineering Society
LA - en
AB - The usage of advanced audio processing algorithms in products has always been limited by the available processing power. For powerful concepts like the wave field synthesis (WFS) the achieved performance is limited by the execution speed. In the past it was possible to increase the performance of digital signal processors by increasing the clock rate. The next generation will be highly parallel heterogeneous multi-processor systems. This paper presents a new parallel processor architecture and the first steps towards an adequate optimization of WFS. A software development environment which assists in creating scalable programs for highly parallel hardware will be further explained. An enhanced WFS convolution structure is presented which use position dependent filtering and improve the interpolation necessary for moving sound sources.
ER -